Binary data systems transmit or store data in the form of one of two signal states. By comparison with analog signal transmission and storage systems, binary data systems can be extremely reliable, because noise inherent in signal processing ordinarily does not affect the signal. A binary signal has the disadvantage of requiring substantially greater bandwidth for a given amount of information than a corresponding analog signal.
The desirable noise immunity properties of binary digits (bits) is achieved by recognizing only one of the two possible signal states at any one time. This recognition requires information relating to the time interval during which a bit occurs. For example, attempting to identify a bit during the transition between signal levels might result in substantial error in the recognition of the data.
A technique which can be used to provide timing information is to transmit a continuous clock signal over a signal path separate from the signal path of the data. This requires two interconnection channels or two interconnection cables in the context of a wired communication system. In a fixed system for point-to-point communications this is a satisfactory solution, but may not be practical for network communication systems. In network systems, any one of a large number of stations interconnected by a common bus may transmit data to the remaining stations for a short interval. This is termed a burst communication. Network communication systems involve many stations and many signal paths, and are often modified and added to. The use of two cables (one data cable and one clock cable) instead of one complicates installation and modification of network communication systems. Furthermore, in order to have the clock signal arrive at a particular station with the proper phase relative to the data signal, each member of the pairs of interconnection cables must have the same length. While trimming a single cable to the proper length or providing a phase adjustment for a single receiver in a point-to-point communication system is not burdensome, the trimming and phase adjusting may be impractical in a large network system which is subject to alteration.
In order to avoid the need for a second cable for distributing the clock signal, encoding methods such as Manchester (Bi-Phase) have been used to encode the clock signal together with the data for transmission over a single channel. Each receiver includes circuits for identifying and extracting the clock signal from the data. A known method for extracting clock information from data signals is by the use of an oscillator controlled by a phase lock loop responsive to transitions of the data signal. The relatively long time constant of the phase lock loop provided by the loop filter prevents the oscillator from drifting off frequency during those times when the data includes no transitions, such as during a long string of logic high levels (hereinafter referred to simply as HIGH) and logic low levels (hereinafter LOWs). In network systems, however, each station may transmit for a short period of time, and the clocks of the various stations may not be at exactly the same phase, nor even at the same frequency. The relatively slow slew rate of a phase lock loop, which is advantageous in the context of a continuous data transmission in preventing drifting off of frequency, has the disadvantage in a burst communication mode of producing clock signals at the wrong frequency or phase for long time after the initiation of the communication. When the clock signal is not in the correct frequency and phase, undesirable data communication errors may result.
Another way of extracting a clock from a data stream is described in the context of a television teletex data signal in U.S. Pat. No. 4,222,117 issued Sept. 9, 1980, to Richard Bugg. This clock recovery circuit applies the data stream from a data slicer to an edge detector, and the edge signals are applied by way of a controlled switch to an inductance-capacitance (LC) tuned circuit to ring the tuned circuit and thereby create oscillations. The oscillations are applied by way of an amplitude limiter to clock the data decoder. In the Bugg arrangement a separate control of the amplitude of the oscillations is provided by operating the controlled switch to increase or decrease the excitation to prevent reduction in the quality (Q) of the tuned circuit due to overexcitation, and to prevent loss of clock signals due to self damping by the tuned circuit under adverse signal conditions.
It is anticipated that network data communication systems using fiber optic cables will in the future operate at data rates which are in the many hundred of megabits per second (Mbits/sec). At such data rates, the electrical signal produced by the photoelectric detector of each receiver must be routed by the use of transmission lines, properly terminated as required to prevent reflections. The Bugg arrangement may be difficult to implement at such data rates. At frequencies in the hundreds of Mbits/sec, an LC tuned circuit has a relatively low Q, and therefore tends to ring for a very short time. This tends to cause large variations in amplitude or to completely extinguish the clock signal during intervals in which the data stream has a low clock signal content. The low Q of the tuned circuit is exacerbated by the relatively low impedance of the switching transitor coupled across the LC tuned circuit.
A clock recovery arrangement for data rates of hundreds of Mbits/sec and greater is needed.